SJEC Mangalore BE VLSI Design & Technology: Fees 2026, Course Duration, Dates, Eligibility

Mangalore, KarnatakaEstd 2002 VTU, Belgaum NAAC Grade A+
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Collegedunia Team

Content Curator | Updated on - Jun 13, 2026

The B.E. (VLSI Design and Technology) at St. Joseph Engineering College (SJEC), Mangalore, is a four-year VTU-autonomous programme approved by AICTE. The curriculum covers VLSI circuit design, semiconductor device physics, RTL design, EDA tools, FPGA prototyping, and chip verification, integrating practicals, mini-projects, and a final-year major project. SJEC holds NAAC A+ accreditation and autonomous status since 2021, with Vamanjoor, Mangalore as its base.

📋 Admission Status: SJEC B.E. (VLSI Design and Technology) admissions for 2026-27 are open. Government-quota seats are filled through KCET counselling by KEA (CET code E129). Management-quota seats are filled through COMEDK UGET counselling. Candidates need 10+2 with Physics, Chemistry, and Mathematics with at least 45% aggregate.


Key Points

  • B.E. VLSI, 4 years, SJEC Mangalore, VTU
  • Focus: VLSI circuit design, semiconductor device physics
  • Total fee 4 years (KCET quota): INR 5,68,440
  • Govt quota via KCET E129, management via COMEDK
  • NAAC A+, Collegedunia rank 421 Engg 2025

SJEC Mangalore BE VLSI Fees

ComponentAmount (INR)
Annual Fee (KCET quota)INR 1,42,110 per year
Total Fees (4 Years)INR 5,68,440
  • Fee shown is for Karnataka government (KCET) quota students.
  • COMEDK and management quota seats carry higher fees.
  • Hostel and transport charges are payable separately.

SJEC Mangalore BE VLSI Admission 2026

Important Dates

EventDate
KCET 2026 Application WindowJanuary 16, 2026 to February 27, 2026
KCET 2026 ExaminationApril 22 to 24, 2026
KCET 2026 ResultJune 6, 2026
COMEDK UGET 2026 ExaminationMay 9, 2026
COMEDK UGET 2026 ResultMay 29, 2026
KEA / COMEDK Counselling and Seat AllotmentJuly to September 2026
Classes CommenceOctober 2026
KCET Registration EndJanuary 16, 2026
KCET Exam DateApril 22 to 24, 2026
KCET ResultJune 6, 2026
COMEDK UGET Registration EndFebruary 3, 2026
COMEDK UGET Exam DateMay 9, 2026
COMEDK UGET ResultMay 29, 2026
  • Register for KCET counselling at cetonline.karnataka.gov.in (CET code E129).
  • COMEDK candidates register for counselling at comedk.org.
  • Bring original 10+2 mark sheets and entrance scorecard at counselling.

The dates mentioned above are tentative and subject to change.

Eligibility Criteria

  • Candidates must have passed 10+2 with Physics, Chemistry, and Mathematics from a recognised board.
  • Minimum aggregate of 45% required (40% for SC/ST Karnataka-domicile candidates).
  • A valid KCET rank is required for government-quota seats, or a valid COMEDK UGET score for management-quota seats.
  • Students appearing in Class 12 may apply provisionally pending result declaration.

Admission Process

  • Appear for KCET (April 22 to 24, 2026) or COMEDK UGET (May 9, 2026) and secure a valid rank.
  • KCET candidates: register for KEA centralised counselling at cetonline.karnataka.gov.in using CET code E129.
  • COMEDK candidates: register at comedk.org and exercise branch and college preference.
  • On seat allotment to SJEC, report with original 10+2 mark sheets, transfer certificate, and entrance scorecard.
  • Pay the prescribed fee and complete VTU enrolment at the SJEC admissions office, Vamanjoor, Mangalore.

✓ Opt for this if

  • Students targeting VLSI design, chip verification, or semiconductor careers
  • Karnataka-domicile candidates seeking KCET quota in a NAAC A+ college
  • Graduates planning M.Tech VLSI or ECE from VTU-affiliated institutions
  • Students wanting specialised EDA tools and FPGA lab exposure in Mangalore

✗ Skip if

  • Students seeking an NBA-accredited branch with long placement track record
  • Candidates interested in software development or IT services rather than chip design
  • Students needing strong civil, mechanical, or power systems specialisation
  • Applicants targeting IIT/NIT-level semiconductor research programmes

SJEC Mangalore BE VLSI Scholarships 2026

ScholarshipAmountEligibility
Karnataka SC/ST Fee ReimbursementFull tuition reimbursementKarnataka-domicile SC and ST students, apply via karepass.cgg.gov.in
Central Sector Scholarship (NSP)Up to INR 12,000 per yearMerit-based, family income below INR 8,00,000, apply at scholarships.gov.in
Post-Matric Scholarship (OBC/Minority)As per government normsKarnataka-domicile OBC and minority candidates, apply via scholarships.gov.in
Education Loan (Nationalised Banks)As per bank policyAll eligible students, contact any nationalised bank branch
  • Karnataka SC/ST students apply via karepass.cgg.gov.in.
  • Central Sector Scholarship: apply at scholarships.gov.in.
  • Education loan details available from the SJEC admissions office.

Table of Contents

SJEC Mangalore Latest Updates and News

26 Aug, 2026 COMEDK BE/BTech Round 4 Counselling 2026 begins. Candidates can edit their choices @comedk.org till Aug 28. Fourth allotment on Sept 1, 2026. Read News.

SJEC Mangalore Important Events

B.E/B.Tech (COMEDK)3

SJEC Mangalore BE VLSI FAQs

Ques. What is the total fee for B.E. VLSI Design and Technology at SJEC Mangalore?

Ans. The total fee for B.E. VLSI Design and Technology at SJEC Mangalore is INR 5,68,440 for the four-year programme (INR 1,42,110 per year) under the government (KCET) quota. COMEDK and management quota seats carry higher fees. Hostel and transport charges are payable separately. Karnataka SC and ST students may apply for state tuition fee reimbursement.

Ques. What is the eligibility for B.E. VLSI Design and Technology at SJEC Mangalore?

Ans. Candidates must have passed 10+2 with Physics, Chemistry, and Mathematics from a recognised board with a minimum aggregate of 45% (40% for SC/ST Karnataka-domicile candidates). A valid KCET rank is required for government-quota seats, and a valid COMEDK UGET score for management-quota seats. Students appearing in Class 12 may apply provisionally.

Ques. What is the difference between KCET and COMEDK for BE admission at SJEC?

Ans. KCET (Karnataka CET) is a state government exam that fills Karnataka-resident quota seats at the lowest regulated fee. COMEDK UGET fills management-quota seats at private engineering colleges across Karnataka at a higher fee. SJEC accepts both. KCET candidates register for KEA centralised counselling using CET code E129, while COMEDK candidates register at comedk.org.

Ques. What are the career options after B.E. VLSI Design and Technology from SJEC Mangalore?

Ans. Graduates pursue roles as VLSI design engineer, RTL designer, FPGA developer, layout engineer, and semiconductor verification engineer. M.Tech (VLSI Design or ECE) via Karnataka PGCET is available for higher studies. SJEC’s placement cell connects graduates with companies in Mangalore, Bengaluru, and across India. Core engineering, IT services, and public-sector technical roles are frequent placements for SJEC graduates.

Ques. What is the admission process for B.E. VLSI Design and Technology at SJEC Mangalore?

Ans. Appear for KCET (exam: April 22 to 24, 2026, conducted by KEA) or COMEDK UGET (exam: May 9, 2026) and secure a valid rank or score. KCET candidates register for KEA centralised counselling at cetonline.karnataka.gov.in using CET code E129. COMEDK candidates register at comedk.org and exercise branch preference. On allotment, report to SJEC with original 10+2 documents and entrance scorecard, then pay the prescribed fee to complete VTU enrolment.

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